Wafer-scale synthesis of WSe(2) for high-performance p-type top-gated transistors and logic circuits.

Wafer-scale synthesis of p-type WSe2 transistors achieves a hole mobility of 10.49 cm² V⁻¹ s⁻¹ and on/off ratios over 10⁹, enabling high-performance 2D electronics.

• Why it matters: High-quality p-type 2D-FETs are essential for CMOS integration but are difficult to produce due to surface damage and unintended doping during fabrication, hindering practical applications.
• What they did: The team used metal-organic chemical vapor deposition to synthesize uniform WSe2 films on a wafer scale and employed a buffer layer strategy to fabricate top-gate p-FETs with enhanced electrostatic control.
• The result: This scalable, damage-free process successfully produced reliable wafer-scale PMOS logic circuits, advancing the integration of 2D materials into high-density electronic devices.